Smartphone Slimming Cure - Increasingly smaller chips only possible with vacuum

Smartphone Slimming Cure - Increasingly smaller chips only possible with vacuum

For the production of today's microchips, some structures used are measured in the nanometer range. The very smallest dust particles and even gas molecules must not interfere. Vacuum is needed to keep them away.
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Today (almost) nothing works without microchips. From cars and production plants to smartphones and even coffee machines – these tiny computers are installed everywhere. It is they that make possible the many functions that are now available to us at the touch of a button or a swipe of a screen. Behind this is an enormous computing power in ever smaller units. Chip manufacturers are currently using mainly 14 nm technology, meaning the smallest functional units are only 14 nanometers in size. For comparison, the diameter of a pinhead is about one million nanometers.

Chucks and vacuum locks

With these sizes, a dust particle acts like a giant boulder. Production therefore takes place in clean rooms with filtered air in which people and goods only enter after thorough cleaning and through an air lock. Vacuum pumps are also used for the latter in order to suction dust particles off surfaces using negative pressure.

There is a slight overpressure in the clean room itself, which means that nothing can get in – even in the event of a leak. The constant air flow required there is supplied from above. The corresponding extraction unit is located in the double floor of the clean room. The silicon wafers, which serve as the basic material for the chips, are fixed by a vacuum holding device (chuck) in various manufacturing steps to protect the material.

Molecules and ions

Up to this point, we have been dealing with rough vacuum. But when it comes to building microscopically small structures, high vacuum is needed. This applies, for example, to the deposition of metal onto the silicon wafers. On the one hand, the metals used reach their boiling point at relatively low temperatures. On the other hand, even the smallest inclusions, even of air gas molecules, would impair the conductivity of the wafer-thin layers. The same applies to ion implantation. There, ions are accelerated in an electric field, directed onto the wafers and placed in the crystal lattice.

EUV lithography would be impossible without vacuum. This relatively new process uses extremely ultraviolet light with a very short wavelength to expose particularly small structures on the wafer surface. EUV light would be completely absorbed by air after just a few millimeters. It can only spread unhindered if the vacuum level is very high. This technology and similar methods are prerequisites, for example, for our smartphones to become thinner and thinner while offering ever-expanding performance.

In the world of semiconductors, the technology node refers to the minimum manufacturing size of the conductive path of a microchip – and this size has been constantly reduced over time.

The first node had a size of 10 micrometers – by today's standards as thick as a garden hose. In mass production, a size of 14 nanometers is used today. However, there are already chips using 10 and even 7 nm technology. The International Technology Roadmap for Semiconductors (ITRS) predicts that 5 nanometers will be achieved by around 2020.

The chip area is approximately halved with each new technology node. The development of the performance of microelectronic circuits follows Moore's law. After that, the complexity of integrated circuits doubles every 12 to 24 months with minimal component costs.


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